Method and apparatus for controlling power efficiency of processor based on polling I/O
US11474588B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2021 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Apr 2, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In accordance with an aspect of the present disclosure, there is provided a method of controlling power efficiency of a processor based on polling I/O. The method comprises checking at every predetermined time period whether a polling count is generated by a polling I/O operation for checking for a completion in response to an I/O request in storage; when it is checked that no polling count is generated, resetting a maximum frequency of the processor to have a default value; and converting a current operation frequency of the processor based on the polling count and an I/O sensitivity of the processor, when it is checked that the polling count is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.