Shift register unit, scan driving circuit, driving method thereof, and display apparatus
US11475812B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2019 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Jul 15, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a shift register unit having a cascade input terminal, a cascade output terminal and a scan output terminal. The shift register unit may include a first shift circuit, a second shift circuit, an input circuit, and a control circuit. The input circuit may be configured to provide an input signal from the cascade input terminal to an input terminal of the first shift circuit under control of an input clock terminal. The control circuit may be configured to control connection of an output terminal of the first shift circuit and an input terminal of the second shift circuit based on a signal at a first control terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.