Non-volatile memory device, controller for controlling the same, storage device having the same, and reading method thereof
US11475972B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Jul 6, 2021 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Jul 6, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1204
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller includes control pins, a buffer memory, an error correction circuit, and a processor driving a read level search unit for a read operation of at least one non-volatile memory device, in which the read level search unit receives fail bit information of a sector error-corrected in the first page from the at least one non-volatile memory device when the error correction of the first read data is not possible, and searches for an optimal read level or set a soft decision offset using the fail bit information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.