Semiconductor integrated circuit device and reception device
US11476848B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2020 |
| Grant date | Oct 18, 2022 |
| Priority date | — |
| Expiry date | Oct 1, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6874
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor integrated circuit device comprises first and second transistors having control terminals receiving an input signal and an inversion signal of the input signal, third and fourth transistors having control terminals receiving the input signal and the inversion signal, first and second inverters in which outputs are connected to inputs of other converters, and a fifth transistor connected to the first to fourth transistors. The third and fourth transistors are connected to outputs of the second and the first inverters. Clock signal is supplied to the fifth transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.