Dynamically throttling host write data rate
US11481145B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 25, 2021 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Feb 25, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention extends to methods, systems, and computer program products for dynamically throttling host write data rates, for example, at SSDs. Host write data is received from a host at a host write data rate. The host write data is buffered in an SSD buffer at the host write data rate. Some host write data is transferred from the SSD buffer to NAND storage at an internal NAND data rate. A host write throttle is calculated at least based on the host data rate and the internal NAND data rate. The host write throttle defines a new (e.g., increased or decreased) host write data rate. The host write throttle is sent to the host requesting the host utilize the new host write data rate. When a new host write data rate is decreased, data transfer from SSD buffer to NAND storage can be allowed to “catch up”.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.