Integrated circuit device including a word line driving circuit
US11482277B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2021 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Sep 9, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a plurality of memory cells each including a channel region, a first sub-word line, a second sub-word line, and a storage element. A word line driving circuit is configured to drive the first and sub-word lines. The word line driving circuit includes a PMOS transistor, an NMOS transistor, a keeping NMOS transistor, and a first keeping PMOS transistor. A negative voltage is applied to a source of the NMOS transistor, the negative voltage is applied to a source of the keeping NMOS transistor, the first sub-word line is connected to a source of the first keeping PMOS transistor, the second sub-word line is connected to a drain of the first keeping PMOS transistor, and a negative voltage is applied to a gate of the first keeping PMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.