Electronic device comprising a chip and at least one SMT electronic component
US11482487B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 6, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Oct 6, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.