VCSEL device with multiple stacked active regions
US11482835B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Apr 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S2301/176
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Methods, devices and systems are described for enabling a series-connected, single chip vertical-cavity surface-emitting laser (VCSEL) array. In one aspect, the single chip includes one or more non-conductive regions one the conductive layer to produce a plurality of electrically separate conductive regions. Each electrically separate region may have a plurality of VCSEL elements, including an anode region and a cathode region connected in series. The chip is connected to a sub-mount with a metallization pattern, which connects each electrically separate region on the conductive layer in series. In one aspect, the metallization pattern connects the anode region of a first electrically separate region to the cathode region of a second electrically separate region. The metallization pattern may also comprise cuts that maintain electrical separation between the anode and cathode regions on each conductive layer region, and that align with the etched regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.