Data packet processing method and apparatus, and device
US11483261B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 8, 2020 |
| Grant date | Oct 25, 2022 |
| Priority date | — |
| Expiry date | Dec 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/42
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention disclose a data packet processing method and apparatus, and a device. The method includes: if a first data packet is received, determining a first cache queue that is in the first buffer and that is used to store the first data packet; buffering the first data packet in the second buffer if a state of the first cache queue is an invalid state, where a data amount of the first data packet is less than the capacity of the second buffer, and the state of the first cache queue is set to the invalid state when a current data amount of the first buffer reaches the capacity of the first buffer; and if a data amount of the second buffer reaches the capacity of the second buffer, sending all data packets that are in the second buffer to a control plane device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.