Array substrate and liquid crystal display panel
US11487174B2 · kind B2 · utility
Inventors
Key dates
| Filing date | May 20, 2020 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Dec 5, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136295
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes a substrate, a first metal layer disposed on the substrate, an insulating layer disposed on the first metal layer, and a second metal layer disposed on the insulating layer. The substrate includes a low-voltage area. One of the first metal layer and the second metal layer includes a plurality of low-voltage signal lines in the low-voltage area. The other one of the first metal layer and the second metal layer includes one or more third auxiliary traces in the low-voltage area. The insulating layer is provided with a plurality of pairs of conductive metalized holes. Each pair of the conductive metalized holes includes two conductive metalized holes electrically connecting two ends of a corresponding third auxiliary trace and two ends of a corresponding low-voltage signal line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.