Flash translation layer table processing method for solid state drive
US11487429B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2021 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | May 17, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FTL table processing method for a solid state drive is provided. When the control circuit intends to perform the backup action on a FTL table, the control circuit calculates the size of a remaining space of a used block. Then, the control circuit judges whether the complete content of the FTL table is required to be backed up to the blank block. If the size of the remaining space of the used block is enough, the control circuit backs up the amended contents of the FTL table and a content changed table to the remaining space of the used block. Whereas, if the size of the remaining space of the used block is not enough, the control circuit backs up the complete content of the FTL table to a plurality of blank blocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.