Artificial reality system with inter-processor communication (IPC)
US11487594B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 4, 2021 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Jun 4, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure describes techniques for interrupt and inter-processor communication (IPC) mechanisms that are shared among computer processors. For example, an artificial reality system includes a plurality of processors and an inter-processor communication (IPC) unit. The IPC unit includes one or more doorbell registers, wherein each doorbell register is associated with a uniquely assigned source processor and a uniquely assigned target processor. Each doorbell register is further configured to store doorbell data indicative of whether an interrupt is a high priority interrupt or a low priority interrupt. The IPC unit may also include one or more FIFO (first-in first-out) memories configured to store data associated with each interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.