Demultiplexer circuit, array substrate, display panel and device, and driving method
US11488561B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2020 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Jan 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0297
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided are a demultiplexer circuit, an array substrate, a display panel and device, and a driving method. The demultiplexer circuit includes multiple demultiplexers, each demultiplexer includes at least two switching transistor groups, and each switching transistor group includes at least two switching transistors. Sources of the at least two switching transistors in a same switching transistor group are electrically connected to each other, drains of the at least two switching transistors in the same switching transistor group are electrically connected to each other. Input ends of the at least two switching transistor groups in a same demultiplexer are electrically connected to each other. In the same switching transistor group, the common source is electrically connected to the input end, the common drain is electrically connected to the output end, and at least two control ends are electrically connected to gates of the switching transistors in a one-to-one correspondence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.