Chip singulation method
US11488867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2022 |
| Grant date | Nov 1, 2022 |
| Priority date | — |
| Expiry date | Apr 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/088
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip singulation method includes, in stated order: forming a surface supporting layer on an upper surface of a wafer; thinning the wafer from the undersurface to reduce the thickness to at most 30 μm; removing the surface supporting layer from the upper surface; forming a first metal layer and subsequently a second metal layer on the undersurface of the wafer; applying a dicing tape onto an undersurface of the second metal layer; applying, onto the upper surface of the wafer, a process of increasing hydrophilicity of a surface of the wafer; forming a water-soluble protective layer on the surface of the wafer; cutting the wafer, the first metal layer, and the second metal layer by irradiating a predetermined region of the upper surface of the wafer with a laser beam; and removing the water-soluble protective layer from the surface of the wafer using wash water.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.