System and method for performing loopback test on PCIe interface
US11493549B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 16, 2020 |
| Grant date | Nov 8, 2022 |
| Priority date | — |
| Expiry date | May 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10189
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus is provided for testing a PCIe interface on a printed circuit assembly. The apparatus can include a plurality of electrical contacts to couple to a PCIe interface of the printed circuit assembly, wherein a respective electrical contact corresponds to a pin of the PCIe interface. The apparatus can also include a plurality of resistors. Each resistor is coupled between two adjacent electrical contacts. At least one electrical contact corresponds to a ground, power, or not connected (NC) pin of the PCIe interface, thereby allowing a loopback test to determine connectivity between the pins of the PCIe interface and the printed circuit assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.