Display panel test circuit
US11493552B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2021 |
| Grant date | Nov 8, 2022 |
| Priority date | — |
| Expiry date | Mar 3, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel test circuit includes a first transistor connected to a first data line and receiving a red lighting test signal, a second transistor connected to the first data line and receiving a blue lighting test signal, a third transistor connected to a second data line and receiving a first green lighting test signal, a fourth transistor connected to a third data line and receiving the red lighting test signal, a fifth transistor connected to the third data line and receiving the blue lighting test signal, a sixth transistor connected to a fourth data line and receiving a second green lighting test signal, a seventh transistor connected to the second data line and receiving a crack test signal, and an eighth transistor connected to the fourth data line and receiving the crack test signal. The display panel test circuit performs one or more tests on a display panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.