Method and apparatus for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs)

US11493945B1 · kind B1 · utility

Assignees

• University of South Florida · US
• Regents of the University of Minnesota · US

Inventors

• Longfei Wang · Longbeilingcun, CN
• S. Karen Khatamifard · Los Angeles, US
• Ulya R. Karpuzcu · Minneapolis, US
• Selcuk Kose · Tampa, US

Key dates

• Filing date: Nov 22, 2019
• Grant date: Nov 8, 2022
• Expiry date: Nov 22, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G05F1/575
• WIPO field: Control
• WIPO sector: Instruments

Abstract

An apparatus and method are provided for mitigating performance degradation in digital low-dropout voltage regulators (DLDOs) caused by the effects of aging on the power transistors of the DLDO, such as by the effects of negative bias temperature instability (NBTI)-induced aging, for example. The apparatus comprises a shift register for use in a DLDO that is configured to activate and deactivate power transistors of the DLDO to evenly distribute electrical stress among the transistors in a way that mitigates performance degradation of the DLDO under various load current conditions. In addition, the shift register and methodology can be implemented in such a way that nearly no extra power and area overhead are consumed.