Power semiconductor module with integrated surge arrester
US11495551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2020 |
| Grant date | Nov 8, 2022 |
| Priority date | — |
| Expiry date | Jul 9, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/473
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor module includes a plurality of power semiconductor chips. A housing accommodates the power semiconductor chips. A first module electrode on a first side of the housing electrically is connected to a first chip electrode of the power semiconductor chips. A second module electrode on a second side of the housing electrically is connected to a second chip electrode. A surge arrester arrangement with a surge arrester is accommodated in the housing such that a first electrode of the surge arrester arrangement is provided at the first side of the housing and a second electrode of the surge arrester arrangement is provided at the second side of the housing. The power semiconductor chips are arranged in an annular region in the housing and the surge arrester arrangement is arranged within the annular region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.