Method for fast booting processors in a multi-processor architecture
US11500648B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2019 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Nov 14, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/654
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for preparing fast boot of an information handling apparatus. The information handling apparatus contains a first CPU configured to connect to a storage device storing firmware and a second CPU connected to the first CPU. The method contains the steps of: allocating a firmware region in memories associated with each one of the first and second CPUs respectively; and copying a firmware from a storage device to the firmware region of each one of the memories. By utilizing a system memory such as NVDIMM which provides higher access speed than NAND flash and also persistent data storage, one or more CPUs can be booted from firmware images in the NVDIMM much faster, thus saving the total booting time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.