Shadow stack enforcement range for dynamic code
US11500981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Apr 7, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/033
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Enforcing shadow stack violations for dynamic code. A thread is executed at a processor, which includes generating a portion of dynamic code for execution by the thread, identifying a range of memory addresses where the portion of dynamic code is loaded in memory, and initiating execution of the portion of dynamic code. Based at least on execution of the thread, an exception triggered by a mismatch between a first return address popped from a call stack corresponding to the thread and a second return address popped from a shadow stack corresponding to the thread is processed. Processing the exception includes (i) determining whether the second return address popped from the shadow stack is within the identified range of addresses, and (ii) based on having determined that the second return address is within the range of addresses, initiating a shadow stack enforcement action.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.