Receivers for performing reference voltage training and memory systems including the same
US11501805B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2021 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Jul 16, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/101
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A receiver including: a data processing circuit, in a training mode, to compare a multi-level signal with first and second voltage signals, and to generate data density signals; a counter circuit to count the data density signals to generate counting values; a control circuit to store, in a register set, a voltage range, counting values corresponding to the voltage range and a control code associated with a first level of the first voltage signal and a second level of the second voltage signal, the voltage range being based on the first and second voltage signals; and a voltage generation circuit, in the training mode, to apply the first and second voltage signals to the data processing circuit and to increase the first level and the second level by a difference between the first and second control signals in response to the control code from the control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.