Display apparatus
US11502111B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2021 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | May 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/131
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display apparatus includes a first silicon transistor including a first semiconductor layer including a silicon-based semiconductor and a first gate electrode; a first oxide transistor including a second semiconductor layer and a second gate electrode, the second semiconductor layer including an oxide-based semiconductor; an upper insulating layer on the first and second semiconductor layers; and a first connection electrode on the upper insulating layer, electrically connected to the first semiconductor layer through a first contact hole of the upper insulating layer, and electrically connected to the second semiconductor layer through a second contact hole of the upper insulating layer. The second semiconductor layer includes a channel region, a source region, and a drain region, and a first distance between the channel region of the second semiconductor layer and the first contact hole is about 2 μm or greater.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.