Semiconductor device and manufacturing method thereof

US11502170B2 · kind B2 · utility

Assignee

• INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD. · CN

Inventors

• King-Yuen Wong · Issaquah, US
• Ronghui Hao · Zhuhai, CN

Key dates

• Filing date: Mar 23, 2020
• Grant date: Nov 15, 2022
• Expiry date: Nov 13, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/811

Abstract

Some embodiments of the present disclosure provide a semiconductor device, including a substrate, a channel layer, a barrier layer, a p-type doped III-V layer, a source, a drain and a doped semiconductor layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The p-type doped III-V layer is disposed on the barrier layer. A gate is disposed on the p-type doped III-V layer. The source and the drain are arranged on two opposite sides of the gate. The doped semiconductor layer is provided with a first side close to the gate and a second side away from the gate. The drain covers the first side of the doped semiconductor layer.