Solar cell emitter region fabrication with differentiated P-type and N-type region architectures
US11502208B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2019 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Sep 14, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
Abstract
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.