Solid-state imaging element and electronic device
US11503235B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 19, 2020 |
| Grant date | Nov 15, 2022 |
| Priority date | — |
| Expiry date | Oct 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/191
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A solid-state imaging element of the present disclosure a pixel. The pixel includes a charge accumulation unit that accumulates a charge photoelectrically converted by a photoelectric conversion unit, a reset transistor that selectively applies a reset voltage to the charge accumulation unit, an amplification transistor having a gate electrode electrically connected to the charge accumulation unit, and a selection transistor connected in series to the amplification transistor. Additionally, the solid-state imaging element includes a first wiring electrically connecting the charge accumulation unit and the gate electrode of the amplification transistor, a second wiring electrically connected to a common connection node of the amplification transistor and the selection transistor and formed along the first wiring, and a third wiring electrically connecting the amplification transistor and the selection transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.