Memory module implementing memory centric architecture
US11507301B2 · kind B2 · utility
4Cited by
59References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 16, 2021 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Feb 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory module for shared memory access implements memory-centric structures using a quasi-volatile memory. In one embodiment, the memory module for shared memory access includes a memory cube providing high capacity memory coupled to multiple multi-port memories to support simultaneous memory access at multiple memory interfaces. In other embodiments, a memory module incorporates a processor to implement computational memory architecture. In some embodiments, a mini core memory system implements a memory architecture for providing direct and parallel memory access to a mini processor core array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.