Gate driving circuit, display device and method for driving display device
US11508279B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2021 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Oct 28, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to a gate driving circuit, a display device, and a method for driving a display device. It is possible to reduce deterioration of the transistor controlled by a first QB node and a second QB node by alternately driving the first QB node and the second QB node of a gate circuit. In addition, by sensing a deterioration deviation between a transistor controlled by the first QB node and a transistor controlled by the second QB node and adjusting a driving period of the first QB node and a driving period of the second QB node based on the sensing result, it is possible to maximize or at least increase the lifetime of the transistor controlled by the first QB node and the transistor controlled by the second QB node, thereby improving the reliability of the gate circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.