Power module package structure
US11508642B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2020 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Mar 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/427
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power module package structure includes, from top to bottom, a layer of power chips, an upper bonding layer, a thermally-conductive and electrically-insulating composite layer, and a heat dissipation layer. The thermally-conductive and electrically-insulating composite layer contains an insulating layer and an upper copper layer that is formed on the insulating layer. One or more layers of upper packaging materials are covered over the layer of power chips and the upper bonding layer and are in contact with an upper surface of the upper copper layer. One or more layers of lower packaging materials are in contact with the insulating layer and are in contact with sidewalls of the upper copper layer. The lower packaging material has a higher rigidity than the upper packaging material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.