Semiconductor structure and manufacturing method thereof
US11508731B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 20, 2022 |
| Grant date | Nov 22, 2022 |
| Priority date | — |
| Expiry date | Jun 20, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
The present application provides a semiconductor structure and a manufacturing method thereof, relates to the technical field of semiconductors. The manufacturing method of a semiconductor structure includes: providing a substrate; forming a plurality of laminated structures arranged at intervals on the substrate, the laminated structure includes a first conductive layer, an insulating layer, and a second conductive layer, and at least one of the first conductive layer and the second conductive layer is a semi-metal layer; forming a channel layer covering the laminated structures, and a dielectric layer covering the channel layer; and forming word lines (WLs) extending along a first direction, the WL includes a plurality of contact parts and a connecting part connecting adjacent contact parts, the contact part surrounds and is in contact with a side surface of the dielectric layer, and the contact part is opposite to at least a part of the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.