Patent · US Active

Sigma-delta analogue to digital converter

US11509326B2 · kind B2 · utility

0Cited by
7References
20Claims
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Key dates

Filing dateMay 17, 2021
Grant dateNov 22, 2022
Priority date
Expiry dateJun 24, 2041

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02T10/70
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A sigma-delta ADC comprising: a first-input-terminal configured to receive a first-high-voltage-analogue-input-signal; a second-input-terminal configured to receive a second-high-voltage-analogue-input-signal; an output-terminal configured to provide an output-digital-signal, wherein the output-digital-signal is representative of the difference between the first-high-voltage-analogue-input-signal and the second-high-voltage-analogue-input-signal. The sigma-delta ADC also includes a feedback-current-block, which comprises: a first-feedback-transistor having a conduction channel; a second-feedback-transistor having a conduction channel; a first-feedback-switch; a second-feedback-switch; a first-feedback-current-source; and a second-feedback-current-source.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.