Synchronization between processes in a coordination namespace
US11513867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2020 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/546
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method of supporting point-to-point synchronization among processes/nodes implementing different hardware barriers in a tuple space/coordinated namespace (CNS) extended memory storage architecture. The system-wide CNS provides an efficient means for storing data, communications, and coordination within applications and workflows implementing barriers in a multi-tier, multi-nodal tree hierarchy. The system provides a hardware accelerated mechanism to support barriers between the participating processes. Also architected is a tree structure for a barrier processing method where processes are mapped to nodes of a tree, e.g., a tree of degree k, to provide an efficient way of scaling the number of processes in a tuple space/coordination namespace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.