Array substrate, manufacturing method thereof, and display device
US11515341B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 20, 2020 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | Jul 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/471
Abstract
The present application relates to the field of display technology and, in particular, to an array substrate, a manufacturing method of the array substrate, and a display device. An array substrate comprises: a base substrate having a pixel display area and a gate drive circuit area; a first thin film transistor formed in the pixel display area, the first thin film transistor comprising a first gate insulating layer; a second thin film transistor formed in the gate drive circuit area, the second thin film transistor comprising a second gate insulating layer, where a thickness of the second gate insulating layer is smaller than a thickness of the first gate insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.