Source driver having an output buffer circuit with slew rate compensation and display device thereof
US11515848B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2021 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit includes an operational amplifier configured to generate an amplifier output voltage signal based on an input voltage signal and on a compensation current, a slew rate compensating circuit configured to generate the compensation current to increase a slew rate of the amplifier output voltage signal based on a difference between the input voltage signal and a feedback voltage signal, an output path circuit connected between the operational amplifier and an output pad, the output path circuit configured to transfer the amplifier output voltage signal to generate a pad output voltage signal through the output pad, and a feedback path circuit, the feedback path circuit connected between the slew rate compensating circuit and a feedback input node that is on the output path circuit, the feedback path circuit configured to generate the feedback voltage signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.