Voltage generation circuit and associated capacitor charging method and system
US11520366B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 2021 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Oct 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J2207/50
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The present application provides a voltage generation circuit and associated capacitor charging method and system. The voltage generation circuit is in a chip and is for generating a first output voltage and a second output voltage. The chip has a first output port and a second output port coupled to a first capacitor and a second capacitor respectively external to the chip. The voltage generation circuit includes a constant current type voltage generation unit and a regulator. When the voltage generation circuit operates in a first mode, the regulator is configured as a unit gain buffer to charge the first capacitor to the first output voltage; and when the voltage generation circuit operates in a second mode, the regulator is configured as a low-dropout regulator to charge the second capacitor to the second output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.