On-demand activation of memory path during sleep or active modes
US11520499B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2022 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | May 18, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A low-power system-on-chip includes an originating controller, a fabric, and a power controller. The originating controller is configured to initiate a memory transaction request including a source address. The fabric includes an arbiter configured to receive the memory transaction request and determine a first memory device associated with the memory transaction request. The power controller is configured to selectively change a first memory bank of the first memory device from a first power mode to a second power mode based at least in part on the source address. The fabric is configured to perform a memory operation by (a) receiving stored data from memory storage locations corresponding to the source address when the memory transaction request includes a read request, and (b) sending data included in the memory transaction request to the memory storage locations when the memory transaction request includes a program or a write request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.