Patent · US Active

Memory access technology and computer system for reducing data error probability

US11521674B2 · kind B2 · utility

0Cited by

1References

15Claims

0Family size

Assignee

Huawei Technologies Co., Ltd. · CN

Inventors

Kraft Kira · Kaiserslautern, DE
Mathew Deepak · Kaiserslautern, DE
Chirag Sudarshan · Kaiserslautern, DE
Jung Matthias · Kaiserslautern, DE
Weis Christian · Kaiserslautern, DE
Norbert Wehn · Queidersbach, DE
Florian Longnos · Nanhu, CN
Gezi Li · Hangzhou City, CN
Wei Yang · Hangzhou City, CN

Key dates

Filing date	Mar 30, 2021
Grant date	Dec 6, 2022
Priority date	—
Expiry date	Mar 30, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory access method and a computer system are provided. According to the memory access method, whether to flip the to-be-stored data for storage may be determined based on quantities of “1” and “0” in data to be written into a dynamic random access memory (DRAM) and a storage mode of the DRAM, to reduce a quantity of storage cells with high electric charges in the DRAM, thereby reducing a data error probability.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.