Packed error correction code (ECC) for compressed data protection

US11522565B2 · kind B2 · utility

Assignee

• NVIDIA Corporation · US

Inventors

• Michael Sullivan · San Jose, US
• Jeffrey Michael Pool · Durham, US
• Yangxiang Huang · San Jose, US
• Timothy Tsai · Milpitas, US
• Siva Kumar Sastry Hari · Sunnyvale, US
• Steven William Keckler · Austin, US

Key dates

• Filing date: Apr 7, 2021
• Grant date: Dec 6, 2022
• Expiry date: Apr 30, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G06N3/084
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A packed error correction code (ECC) technique opportunistically embeds ECC check-bits with compressed data. When compressed, the data is encoded in fewer bits and is therefore fragmented when stored or transmitted compared with the uncompressed data. The ECC check-bits may be packed with compressed data at “source” points. The check-bits are transmitted along with the compressed data and, at any “intermediate” point between the source and a “destination” the check-bits may be used to detect and correct errors in the compressed data. In contrast with conventional systems, packed ECC enables end-to-end coverage for sufficiently-compressed data within the processor and also externally. While storage circuitry typically is protected by structure-specific ECC, protection is also beneficial for data as it is transmitted between processing and/or storage units.