High speed two-dimensional event detection and imaging using an analog interface and a massively parallel processor
US11523076B2 · kind B2 · utility
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4References
17Claims
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Key dates
| Filing date | Jun 6, 2021 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Jun 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/77
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A quantitative pulse count (event detection) algorithm with linearity to high count rates is accomplished by combining a high-speed, high frame rate camera with simple logic code run on a massively parallel processor such as a GPU or a FPGA. The parallel processor elements examine frames from the camera pixel by pixel to find and tag events or count pulses. The tagged events are combined to form a combined quantitative event image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.