Prefetch mechanism for a cache structure
US11526356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2020 |
| Grant date | Dec 13, 2022 |
| Priority date | — |
| Expiry date | May 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method is provided, the apparatus comprising a processor pipeline to execute instructions, a cache structure to store information for reference by the processor pipeline when executing said instructions; and prefetch circuitry to issue prefetch requests to the cache structure to cause the cache structure to prefetch information into the cache structure in anticipation of a demand request for that information being issued to the cache structure by the processor pipeline. The processor pipeline is arranged to issue a trigger to the prefetch circuitry on detection of a given event that will result in a reduced level of demand requests being issued by the processor pipeline, and the prefetch circuitry is configured to control issuing of prefetch requests in dependence on reception of the trigger.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.