Caching override indicators for statistically biased branches to selectively override a global branch predictor
US11526359B2 · kind B2 · utility
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Key dates
| Filing date | Oct 3, 2018 |
| Grant date | Dec 13, 2022 |
| Priority date | — |
| Expiry date | Jul 2, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus is provided that includes global-history prediction circuitry that provides a prediction of an outcome of a given control flow instruction based on a result of execution of one or more previous control flow instructions. Correction circuitry provides a corrected prediction of the global-history prediction circuitry in respect of the given control flow instruction and cache circuitry, separate from the correction circuitry, stores the corrected prediction in respect of the given control flow instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.