Patent · US Active

Storage architectures for graph analysis applications

US11526483B2 · kind B2 · utility

0Cited by
0References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 30, 2018
Grant dateDec 13, 2022
Priority date
Expiry dateOct 7, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F16/9024
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods, apparatus, systems and articles of manufacture to build a storage architecture for graph data are disclosed herein. Disclosed example apparatus include a neighbor identifier to identify respective sets of neighboring vertices of a graph. The neighboring vertices included in the respective sets are adjacent to respective ones of a plurality of vertices of the graph and respective sets of neighboring vertices are represented as respective lists of neighboring vertex identifiers. The apparatus also includes an element creator to create, in a cache memory, an array of elements that are unpopulated. The array elements have lengths equal to a length of a cache line. In addition, the apparatus includes an element populater to populate the elements with neighboring vertex identifiers. Each of the elements store neighboring vertex identifiers of respective ones of the list of neighboring vertex identifiers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.