Fault isolation and recovery of CPU cores for failed secondary asymmetric multiprocessing instance
US11531607B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2020 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Jun 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to certain embodiments, a system includes one or more processors and one or more computer-readable non-transitory storage media comprising instructions that, when executed by the one or more processors, cause one or more components to perform operations including executing a software process of a secondary instance, the secondary instance running in parallel with a primary instance and associated with a plurality of cores including a bootstrap core, registering a non-maskable interrupt for the bootstrap core in the secondary instance, determining whether the secondary instance is in a fault state, wherein, if the secondary instance is in the fault state, halting the plurality of cores associated with the secondary instance, without impact to the primary instance, and recovering the bootstrap core by switching a context of the bootstrap core from the secondary instance to the primary instance via the non-maskable interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.