Sparse rendering in computer graphics
US11532068B2 · kind B2 · utility
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2References
19Claims
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Key dates
| Filing date | Feb 1, 2017 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Dec 30, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T17/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing system has a tiling unit that tiles a first view of a scene into multiple tiles and generates a list of primitives associated with each tile. A processing unit identifies a first subset of the tiles that are each associated with at least a predetermined number of primitives in dependence on the list. A rendering unit then renders each of the identified tiles to a render target.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.