Package structure

US11532564B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Yi-Da Tsai · Dingshanjiao, TW
• Cheng Ping Lin · Daxi District, TW
• Wei-Hung Lin · Xinfeng, TW
• Chih-Wei Lin · Hsinchu, TW
• Ming-Da Cheng · Zhubei City, TW
• Ching-Hua Hsieh · Hsinchu, TW
• Chung-Shi Liu · Baoshan, TW

Key dates

• Filing date: Dec 14, 2020
• Grant date: Dec 20, 2022
• Expiry date: Dec 14, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3511
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a package layer surrounding the integrated circuit die. The package structure also includes a redistribution structure over the package layer and electrically connected to the integrated circuit die. The redistribution structure includes a passivation layer and a conductive layer formed in the passivation layer. The integrated circuit die further includes a connector formed over the conductive layer and covered a top surface of the passivation layer. In addition, a bottom surface of the connector and a top surface of the connector are both wider than a neck portion of the connector.