Process for tuning via profile in dielectric material
US11532692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2021 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Aug 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an integrated circuit structure includes forming a first magnetic layer, forming a first conductive line over the first magnetic layer, and coating a photo-sensitive coating on the first magnetic layer. The photo-sensitive coating includes a first portion directly over the first conductive line, and a second portion offset from the first conductive line. The first portion is joined to the second portion. The method further includes performing a first light-exposure on the first portion of the photo-sensitive coating, performing a second light-exposure on both the first portion and the second portion of the photo-sensitive coating, developing the photo-sensitive coating, and forming a second magnetic layer over the photo-sensitive coating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.