Circuit, chip and semiconductor device
US11533056B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2019 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Jul 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit is disclosed. The circuit includes a time-to-digital converter (TDC), and an evaluation circuit coupled to the TDC and a phase-locked loop (PLL) external to the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.