Circuitry including at least a delta-sigma modulator and a sample-and-hold element
US11533061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2021 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Jun 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/458
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuitry for an incremental delta-sigma modulator includes at least an incremental delta-sigma modulator and a sample-and-hold element, the sample-and-hold element being arranged in front of the incremental delta-sigma modulator and providing an input voltage for the incremental delta-sigma modulator in the charged state, wherein the sample-and-hold element includes a capacitor for charging the input voltage for the incremental delta-sigma modulator, wherein a first switch is arranged in front of the capacitor, and a second switch is arranged behind the capacitor, wherein the first switch is open when the second switch is closed so as to provide, at the incremental delta-sigma modulator, an input voltage decreasing in amount, in particular a decaying input voltage, or wherein the second switch is open when the first switch is closed so as to charge the capacitor of the sample-and-hold element. In addition, a method of operating a circuitry for an incremental delta-sigma modulator is proposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.