Shift register unit and driving method thereof, gate drive circuit, and display device
US11538395B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Dec 27, 2022 |
| Priority date | — |
| Expiry date | Jun 21, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/023
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit includes an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to provide signals of the signal input terminal to the first control node, and provide signals of the first power supply terminal or the first clock signal terminal to the second control node. The first control circuit is configured to provide signals of the second power supply terminal or the second clock signal terminal to the first output terminal. The second control circuit is configured to provide signals of the first power supply terminal to the second output terminal. The output circuit is configured to provide signals of the second power supply terminal to the second output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.