Patent · US Active

First shift register, driving method thereof, gate driving circuit, and display device

US11538397B2 · kind B2 · utility

0Cited by
1References
15Claims
0Family size

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Key dates

Filing dateSep 27, 2021
Grant dateDec 27, 2022
Priority date
Expiry dateSep 27, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2320/0646
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

Disclosed are a first shift register, a driving method for the same, a gate driving circuit and a display device. The first shift register includes a first unit, M second units and N third units. A first signal output terminal of the first unit is connected with M second signal input terminals of the M second units. A second signal output terminal of each second unit is connected with third signal input terminals of N/M third units respectively. The first unit outputs a voltage of a first clock signal terminal to the first signal output terminal and a fourth signal output terminal under the control of a first signal input terminal and a second clock signal terminal and outputs a voltage of a first voltage terminal to the first signal output terminal and the fourth signal output terminal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.