Semiconductor devices having asymmetrical structures
US11545489B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2021 |
| Grant date | Jan 3, 2023 |
| Priority date | — |
| Expiry date | Mar 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction; a device isolation layer between the first and second active regions in the substrate; and first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions. The first gate structure includes a first gate electrode. The second gate structure includes a second gate electrode. The first gate structure protrudes further toward the device isolation layer, as compared to the second gate structure, in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.